MediaTek Inc (聯發科), the world’s biggest smartphone chip supplier, yesterday said it plans to double investment in data center-related technologies, including advanced packaging and high-speed interconnect technologies, to broaden the new business’ customer and service portfolios.
The chip designer is redirecting its resources to data centers, mainly designing application-specific integrated circuits (ASIC) with artificial intelligence (AI) capabilities for cloud service providers.
The data center business is forecast to lead growth in the next three years and become the company’s second-biggest revenue source, replacing chips used in smart devices, MediaTek president Joe Chen (陳冠州) told a media event in Taipei.
Photo: Lisa Wang, Taipei Times
“Three or four years ago, the [chip] market was driven by consumer [electronics]. Now it is shifting to a high-performance-computing-oriented market either on the cloud or on the edge,” Chen said.
The data center ASIC business would contribute 20 percent to the company’s revenue next year, MediaTek told investors on Wednesday.
To capture new growth opportunities, MediaTek said it plans to invest heavily in critical technologies, to optimize the total ownership of costs of AI data centers by enhancing the computing power of ASIC, Chen said.
Photo: Lisa Wang, Taipei Times
Toward that end, MediaTek is allocating more resources to develop new advanced packaging technology, co-packaged opticals and silicon photonics technology in collaboration with Taiwan Semiconductor Manufacturing Co (TSMC, 台積電) under the foundry service provider’s compact-universal-photonic-engines platform, to boost energy efficiency and performance, Chen said.
Additionally, the company plans to roll out new high-speed SerDes interface chips later this year with a data operating rate of 400 gigabits per second, double the speed of the previous generation, Chen said.
High-speed SerDes interface technologies are essential for AI, 5G and data center infrastructure to ensure signal integrity.
MediaTek is also pushing for adoption of next-generation chip manufacturing process technologies — 2 nanometers and 14A, or 1.4 nanometers — to enhance the computing power of AI ASIC.
“We will be the first-wave customer of 2-nanometer and A14 advanced process technologies, which will not be limited to data center [chip production],” Chen said.
MediaTek is usually one of the earliest adopters of TSMC’s most advanced processes. TSMC’s 2-nanometer process technology entered volume production late last year and it is expected to start mass production of A14 in 2028.
Asked if MediaTek would consider adopting Intel Corp’s advanced packaging technology, called Embedded Multi-die Interconnect Bridge (EMIB), Chen said the company would be open-minded about it and would see which technology suits its customers best.
Intel’s EMIB technology is considered a potential alternative to TSMC’s chip-on-wafer-on-substrate technology amid severe supply constraints of the advanced packaging technology.
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