The global chip shortage last year caused an unprecedented supply-chain crisis, affecting many key industries, including the auto industry. Europe, Japan and the US began to realize the indispensability and ubiquitous dominance of Taiwan’s semiconductor manufacturing industry. At the same time, amid the US-China trade war, Beijing’s military aggressions against Taiwan became increasingly blatant and provocative.
In light of these developments, Europe, Japan and the US are formulating new policies to rebuild their domestic semiconductor manufacturing base, so as to mitigate the enormous geopolitical and economic risks involved.
Last year, Taiwan Semiconductor Manufacturing Co (TSMC) commanded 56 percent of the global chip manufacturing market, with its share of the high-end segment (10 nanometer and more advanced processes) reaching 63 percent.
Nvidia’s Jensen Huang (黃仁勳) best summed up the important role that TSMC plays in the world: “If you go into any business meeting any time anywhere in the world, at least one of the attendees will carry products containing chips manufactured by TSMC. The pervasiveness of TSMC’s products is like water.”
Extremely uneasy with TSMC’s meteoric rise in the past five years, especially its growing dominance in the most advanced chip manufacturing segment, South Korea, the US, Japan and Europe vowed to invest heavily in semiconductor manufacturing technology and compete head-to-head with TSMC. For example, just last month, reports said that the US and Japan would jointly develop 2-nanometer process technology, with mass production expected in 2025.
In the face of such open challenges from traditional technological superpowers worldwide, what competitive barriers has TSMC established to fend off these challenges and maintain its lead? Specifically, how can TSMC’s advanced chip process technology research and development (R&D) departments, which are mostly populated by Taiwanese talent, compete with those at elite universities, research institutes and companies in the US, Japan and Europe?
Advanced chip process technology R&D involves customized assembly of multiple types of precision equipment and the adjustment and optimization of their operating parameters, and requires a research infrastructure that is extremely expensive and thus unaffordable for most universities and research institutions. Moreover, none of the semiconductor companies are willing to open up their high-end equipment to external researchers.
As a result, in the past 10 years, most semiconductor research teams in top universities, such as the Massachusetts Institute of Technology, Stanford and University of California, Berkeley, could only focus on theoretical exploration and analysis of innovative semiconductor devices, but rarely involved themselves in the development, design and refinement of cutting-edge semiconductor manufacturing processes.
Consequently, the R&D crown jewels of the US, Japan and Europe — their top universities and research institutions — might not, in the short term, be able to help with or contribute much to the global race for leading-edge semiconductor process design.
Even if top researchers in the US, Japan and Europe were able to get their hands on the most advanced equipment, they would still need a solid basis to jump-start their research efforts, which they might not have.
Pushing the semiconductor manufacturing boundary requires advances in multiple dimensions such as materials, chemical processes, equipment, software control, testing and personnel training. Accordingly, the (N+1)-th generation process is mostly built on top of the N-th or (N-1)-th generations. The fact that TSMC has enjoyed a commanding lead in the 10-nanometer, 7-nanometer and 5-nanometer processes gives it a valuable foundation and competitive advantage for developing 3-nanometer and 2-nanometer processes.
In addition to manufacturing precision, the ability to tailor a manufacturing process to customers’ specific needs is a critical competitive edge. Over the past 30 years, TSMC has worked on tens of thousands of chip manufacturing projects with hundreds of customers. Along the way, it has accumulated an enormous amount of application and domain knowledge, and cultivated a wide array of customization skills to fill diversified customer needs, such as, advanced packaging for heavy-duty power electronics circuits and wafer stacking manufacturing for CMOS image sensors. For potential competitors of TSMC, acquiring such a customization skill set would require a relatively long learning curve.
When selecting manufacturing partners, chip design companies place special emphasis on the trustworthiness of the semiconductor foundries they work with, because the former trust the latter with their intellectual property secrets and final product’s quality.
Such trust is difficult to establish if they have conflicting business interests. For example, it is difficult for Apple to count on Samsung’s semiconductor manufacturing because the two are competitors in the mobile phone market; similarly, Nvidia is unlikely to use Intel’s semiconductor manufacturing because they are rivals in the data center market. Because TSMC is positioned as a pure-play semiconductor foundry, building long-term partnership relationships with chip design companies is much easier.
Last but not least, TSMC has substantially extended the scope of its manufacturing service to the realm of chip design. Specifically, it strives to reduce customers’ end-to-end complexity in chip design and manufacturing by providing standard circuit components that have been pre-verified against the target manufacturing process, accelerating the process-specific circuit placement and routing chore, assisting in diagnosis to fix design errors, and helping designers maximize their chip’s manufacturability and yield, among others.
Over the years, TSMC’s customers have become used to this kind of cradle-to-grave chip manufacturing service, and will come to expect the same from other foundries, which might pose a significant challenge for non-pure-play semiconductor manufacturing companies that do not have the necessary work culture, discipline and information-technology support.
Chiueh Tzi-cker is a joint appointment professor in the Institute of Information Security at National Tsing Hua University.
Weeks into the craze, nobody quite knows what to make of the OpenClaw mania sweeping China, marked by viral photos of retirees lining up for installation events and users gathering in red claw hats. The queues and cosplay inspired by the “raising a lobster” trend make for irresistible China clickbait. However, the West is fixating on the least important part of the story. As a consumer craze, OpenClaw — the AI agent designed to do tasks on a user’s behalf — would likely burn out. Without some developer background, it is too glitchy and technically awkward for true mainstream adoption,
Out of 64 participating universities in this year’s Stars Program — through which schools directly recommend their top students to universities for admission — only 19 filled their admissions quotas. There were 922 vacancies, down more than 200 from last year; top universities had 37 unfilled places, 40 fewer than last year. The original purpose of the Stars Program was to expand admissions to a wider range of students. However, certain departments at elite universities that failed to meet their admissions quotas are not improving. Vacancies at top universities are linked to students’ program preferences on their applications, but inappropriate admission
On Monday, a group of bipartisan US senators arrived in Taiwan to support the nation’s special defense bill to counter Chinese threats. At the same time, Beijing announced that Chinese President Xi Jinping (習近平) had invited Chinese Nationalist Party (KMT) Chairwoman Cheng Li-wun (鄭麗文) to visit China, a move to make the KMT a pawn in its proxy warfare against Taiwan and the US. Since her inauguration as KMT chair last year, Cheng, widely seen as a pro-China figure, has made no secret of her desire to interact with the Chinese Communist Party (CCP) and meet with Xi, naming it a
Taiwan People’s Party (TPP) Chairman Huang Kuo-chang (黃國昌) took the stage at a protest rally on Sunday in front of the Presidential Office Building in Taipei in support of former TPP chairman Ko Wen-je (柯文哲), who has been sentenced to 17 years in jail for corruption and embezzlement. Huang told the crowd that Chinese Nationalist Party (KMT) Chairwoman Cheng Li-wun (鄭麗文) had sent a message of support the previous day, saying she would be traveling from the south to Taipei: If the protest continued into the evening, she had said, she would show up. The rally was due to end