Taiwan Semiconductor Manufacturing Co (TSMC, 台積電) is to build a wafer fab deploying 1 nanometer (nm) process technology at the Longtan (龍潭) campus of Hsinchu Science Park (新竹科學園區), Hsinchu Science Park Bureau Director-General Wayne Wang (王永壯) said yesterday.
The bureau completed a pilot project in the middle of last month for the third expansion phase of the Longtan Science Park (龍潭科學園區) in Taoyuan to accommodate the new TSMC plant, Wang told a news conference.
The pilot expansion project has been submitted to the National Science and Technology Council, which would next forward the project to the Cabinet for approval, Wang said.
Photo: Grace Hung, Taipei Times
“The efforts by the government to push for the construction of TSMC’s 1-nanometer process fab are proceeding smoothly,” he added.
Local media reports have said that the Longtan park’s third expansion phase would cover 150 hectares.
As 90 percent of the land is privately owned, it would require a huge effort to expropriate the land needed, the reports said.
2-NANOMETER FAB
Meanwhile, a new expansion plan in the Central Taiwan Science Park (中部科學園區) passed its third review yesterday, clearing the way for its final passage during a general review early next year, which would allow TSMC to build a 2-nanometer fab by the middle of next year, the Central Taiwan Science Park Administration said yesterday.
The administration said in a statement that it would submit supplementary information about the second-phase expansion plan to the Environmental Protection Administration as soon as possible after receiving a written record of the review.
The administration aims to complete all administrative procedures and hand over the land to local foundry companies to build new factories by the middle of next year, it said.
It added that it plans to attract other technology firms to set up facilities in the park to support the expansion and development of the semiconductor industry in Taiwan.
The development project would create NT$485.7 billion (US$15.95 billion) in production value a year and 4,500 direct jobs, the statement said.
TSMC plans to start pilot production of 2-nanometer chips in the second half of 2024 and commence mass production in 2025.
Its development of 2-nanometer process technology is progressing well and is even a little ahead of its schedule, TSMC chief executive C.C. Wei (魏哲家) said in October.
Customer engagement with the 2-nanometer chips is comparable with their engagement with the company’s 3-nanometer and 5-nanometer chips, he said.
TSMC said its 2-nanometer technology would be the most advanced in terms of density and energy efficiency when it is introduced.
ARIZONA FAB
The company is scheduled to hold a “first tool-in” ceremony for its new Arizona fab today to mark the installation of the first batch of production equipment, with US President Joe Biden expected to attend the event.
The company is spending US$12 billion to build a 5-nanometer fab in Arizona, with mass production to start in 2024. It plans to introduce 3-nanometer process technology during the second phase of the Arizona investment.
RUN IT BACK: A succesful first project working with hyperscalers to design chips encouraged MediaTek to start a second project, aiming to hit stride in 2028 MediaTek Inc (聯發科), the world’s biggest smartphone chip supplier, yesterday said it is engaging a second hyperscaler to help design artificial intelligence (AI) accelerators used in data centers following a similar project expected to generate revenue streams soon. The first AI accelerator project is to bring in US$1 billion revenue next year and several billion US dollars more in 2027, MediaTek chief executive officer Rick Tsai (蔡力行) told a virtual investor conference yesterday. The second AI accelerator project is expected to contribute to revenue beginning in 2028, Tsai said. MediaTek yesterday raised its revenue forecast for the global AI accelerator used
Taiwan Semiconductor Manufacturing Co (TSMC, 台積電) has secured three construction permits for its plan to build a state-of-the-art A14 wafer fab in Taichung, and is likely to start construction soon, the Central Taiwan Science Park Bureau said yesterday. Speaking with CNA, Wang Chun-chieh (王俊傑), deputy director general of the science park bureau, said the world’s largest contract chipmaker has received three construction permits — one to build a fab to roll out sophisticated chips, another to build a central utility plant to provide water and electricity for the facility and the other to build three office buildings. With the three permits, TSMC
The DBS Foundation yesterday announced the launch of two flagship programs, “Silver Motion” and “Happier Caregiver, Healthier Seniors,” in partnership with CCILU Ltd, Hondao Senior Citizens’ Welfare Foundation and the Garden of Hope Foundation to help Taiwan face the challenges of a rapidly aging population. The foundation said it would invest S$4.91 million (US$3.8 million) over three years to foster inclusion and resilience in an aging society. “Aging may bring challenges, but it also brings opportunities. With many Asian markets rapidly becoming super-aged, the DBS Foundation is working with a regional ecosystem of like-minded partners across the private, public and people sectors
BREAKTHROUGH TECH: Powertech expects its fan-out PLP system to become mainstream, saying it can offer three-times greater production throughput Chip packaging service provider Powertech Technology Inc (力成科技) plans to more than double its capital expenditures next year to more than NT$40 billion (US$1.31 billion) as demand for its new panel-level packaging (PLP) technology, primarily used in chips for artificial intelligence (AI) applications, has greatly exceeded what it can supply. A significant portion of the budget, about US$1 billion, would be earmarked for fan-out PLP technology, Powertech told investors yesterday. Its heavy investment in fan-out PLP technology over the past 10 years is expected to bear fruit in 2027 after the technology enters volume production, it said, adding that the tech would
RSS