Sat, Oct 11, 2014 - Page 13 News List

UMC China investment labeled a risk

VENTURE INTO UNKNOWN:Due to a lack of semiconductor infrastructure in China, analysts remain skeptical over the proposed venture’s potential earnings contribution

By Lisa Wang  /  Staff reporter

United Microelectronics Corp’s (UMC, 聯電) latest US$1.35 billion investment plan to form a Chinese joint venture might be more a challenge than a growth opportunity for the chipmaker, due to escalating price competition in China and its relatively weak technological capabilities, analysts said.

Most analysts kept their rating on the nation’s No. 2 contract chipmaker unchanged, as they are skeptical about earnings contribution from the Chinese joint venture, while UMC’s slow ramp-up of 28-nanometer (nm) technology might weigh on its profit margin in the current quarter, they said.

Based on the agreement, UMC is scheduled to make chips at a new 12-inch wafer factory, using 55nm and 40nm technology, via a three-way venture between UMC, the Xiamen government and Fujian Electronics & Information Group (福建電子信息集團).

The new plant, worth US$6.2 billion, is scheduled to start production by the end of 2016 and has production capacity of 50,000 wafers a month.

Through this joint venture, UMC is expected to expand its foundry businesses of display driver ICs, image signal processors, image sensors, touch controller chips for smartphones and tablets in China as these chips are set to migrate to 55nm and 40nm in 2016, Deutsche Bank analyst Michael Chou (周立中) said in a report released on Thursday.

UMC may also try to provide connectivity IC for the Internet of Things (IoT) business through the Chinese venture, Chou said.

“The earnings contribution from this joint venture could be limited for UMC in 2016 and 2017,” Chou said, citing intensified pricing competition in 55nm and 40nm technology from China’s Semiconductor Manufacturing International Corp (SMIC, 中芯).

Besides, UMC lags behind bigger rival Taiwan Semiconductor Manufacturing Co (TSMC, 台積電) in making CMOS image sensors and ultra-low-power chips, Chou said.

The ultra-low-power technology is set to be key for a foundry to tap into IoT business opportunites, he added.

TSMC, the world’s largest contract chip maker, on Thursday announced that it has no plan to follow UMC in setting up a 12-inch wafer factory in China.

TSMC said it has built comprehensive industrial infrastructure in Taiwan and it has a competitive edge in operating efficiency without needing to build a plant on the other side of the Taiwan Strait.

“There is no need to establish a 12-inch wafer foundry in China, and there are no relevant plans to do so,” TSMC said in a statement.

The planned Chinese joint venture is likely to help UMC benefit from the substantial growth in China and foundry opportunities worldwide in the long run, Citigroup Global Markets Inc analyst Roland Shu (徐振志) said.

The catch is that there is no semiconductor cluster or semiconductor infrastructure in Xiamen, he said.

“We believe that it will be a huge challenge for UMC to establish the new joint venture fab operation,” Shu said in a separate note on Thursday.

“Return on investment of the joint venture, in our view, won’t be attractive in the near term,” he said.

JPMorgan analyst Gokul Hariharan believes UMC’s latest plan to adopt a capital-injection-based joint venture at lagging nodes, 55nm and 40nm technologies, may be a prudent step to drive future growth, given rising capital intensity at leading edge nodes and UMC’s constrained balance sheet.

If the government allows UMC to transfer 40nm and 55nm technologies to China, “we could see Taiwanese foundries catching up with SMIC as a leading partner for China fabless customers,” Hariharan said in a report issued on Thursday.

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