Artificial intelligence (AI) is reshaping competition in the semiconductor industry, shifting the focus beyond transistor scaling to advanced packaging, materials and system-level integration, experts said at a Taiwan-Japan semiconductor technology forum yesterday.
Taiwan Semiconductor Research Institute (TSRI) deputy director-general Tsai Hann-huei (蔡瀚輝) said advances in process-node technology were slowing while AI-driven demand for bandwidth continued to surge.
“Leadership will come from system-level co- optimization, not transistor scaling alone,” Tsai said at the forum in Taipei.
Photo: Chen Yi-kuan, Taipei Times
Future semiconductor systems will increasingly need to combine computing, sensing, power management and connectivity for applications such as automobiles, humanoid robots, AI glasses and drones, according to his presentation.
Tsai said TSRI provides a die-level heterogeneous integration and verification platform to help designers develop next-generation chip systems.
However, progress in advanced packaging and silicon photonics faces challenges involving the interaction of heat, electricity, optics and mechanical stress, as well as large-scale testing and coordination across the semiconductor ecosystem, he said.
Overcoming those barriers will require partnerships among industry, academia and research institutions, he added.
According to his presentation, TSRI is already collaborating with Japanese partners on three-dimensional heterogeneous integration, advanced packaging, quantum computing, power devices and materials analysis.
Meanwhile, Dinos Huang (黃敏龍), senior director of corporate research and development at ASE Technology Holding Co (日月光投控), said the rapid expansion of AI models and applications was shifting pressure onto the physical infrastructure needed to run them.
“Hardware is becoming the new bottleneck,” Huang said.
AI and high-performance computing systems require greater bandwidth and computing power while posing growing challenges in power consumption, latency, cooling and structural stability, he said.
Meeting those demands will require advances in packaging equipment, low-loss and heat-resistant materials, heterogeneous integration, inspection, testing and smart manufacturing, he added.
ASE is expanding from wafer-level to panel-level packaging, which offers a larger usable area and can improve material utilization as AI processors grow in size and complexity, Huang said.
The industry is also moving toward optical interconnects to replace electrical transmission between systems and chips, enabling higher speeds while reducing energy consumption, he said.
The forum, organized by the Taiwan-Japan Semiconductor Technology Association, focused on opportunities for bilateral semiconductor collaboration in the AI era.
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