Semiconductor equipment manufacturer Skytech Inc (天虹科技) yesterday said it expects to outpace its rivals in a major chip packaging technology shift by delivering in November its first equipment for commercializing fan-out panel-level packaging (PLP) technology .
That would put Skytech ahead of its rivals by about two quarters in supplying physical vapor deposition (PVD) used in PLP technology — also called chip-on-panel-on-substrate (CoPoS).
Most semiconductor equipment makers are expected to ship similar equipment from the second quarter next year, the company said.
Photo: Lisa Wang, Taipei Times
Skytech said it expects to ship two more PVDs before the end of this year.
The equipment, which costs up to US$4 million each, is to be showcased at the annual Semicon trade show in Taipei next week.
“One of our winning strategies is ‘speed’ against bigger global rivals,” Skytech CEO George Yi (易錦良) said at the company’s factory in Hsinchu County’s Hukou Township (湖口).
“Leveraging the strength of Taiwan’s major semiconductor companies, we are able to swiftly respond to their needs and roll out new products faster,” Yi said.
The PLP, or CoPoS, technology is widely expected to be a successor to chip-on-wafer-on-substrate (CoWoS) technology, which is currently used in packaging Nvidia Corp’s artificial intelligence (AI) chips.
The major technology shift would replace 300mm round wafer carriers with 310mmx310mm square panel carriers, addressing constraints on usable areas and capacity, the company said.
“Adopting panel-level substrates is the trend, as AI chips are getting bigger and bigger,” Yi said. “A panel-level substrate can produce nine AI chips, which is about 2.25 times more than four chips cut from a 12-inch [round] wafer.”
Skytech is also making inroads into the semiconductor inspection segment by supplying tools for inspecting pellicles used in extreme ultraviolet lithography (EUV) tools.
EUV tools are utilized by chipmakers such as Taiwan Semiconductor Manufacturing Co (TSMC, 台積電) to produce cutting-edge 3 or 4-nanometer chips.
Skytech plans to introduce an upgraded version of its EUV pellicle inspection equipment in the first quarter of next year. If the development goes smoothly, Skytech is likely to become the second supplier of EUV pellicle inspection tools in the world after EUV Tech Inc based in Martinez, California, the US.
The firm has a broad customer base that includes TSMC and ASE Technology Holding Co (日月光投控), the world’s biggest chip packager and tester.
Skytech’s net profit in the first half of the year plummeted about 62 percent from a year earlier to NT$68.11 million (US$2.22 million), mainly due to foreign exchange losses. Earnings per share fell to NT$1.01 from NT$2.64.
The company still aimed to grow its bottom line for the full year of this year, compared with NT$407 million last year. Revenue would also rise from last year’s NT$2.59 billion, on the back of robust demand from chip packagers and testers, it said.
Revenue slid slightly to NT$974 million during the same period, from NT$1 billion a year earlier. Semiconductor equipment made up about 50 percent of its total revenue, with the other half coming from chip equipment components.
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