Sun, May 06, 2007 page12

• Nanotechnology boosts chip performance

  IBM said it has come up with a way to reduce the energy consumption of chips and to make them run faster

  • By Peter Svensson / AP
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  Computer chips, it seems, work better if they're more like Swiss cheese than American cheese.

  Chips with minuscule holes in them can run faster or use less energy, IBM Corp said in announcing on Thursday a novel way to create them -- potentially one of the most significant advances in chip manufacturing in years.

  To create these tiny holes, the computer company has harnessed a plastic-like material that spontaneously forms into a sieve-like structure. The holes have a width of 20 nanometers, or billionths of a meter, placing the method in the much-vaunted field of nanotechnology.

  "To our knowledge, this is the first time anyone has used nano-scale self-assembled materials to build things that machines aren't capable of doing," said John Kelly, vice president of development at IBM.

  Kelly said molecules in the material fall into a defined pattern similar to how snowflakes form into symmetrical six-sided shapes.

  IBM said the technology could be added to existing manufacturing lines and applied to current chips, boosting performance by 35 percent or cutting power consumption by the same percentage.

  It expects to start using the technique in 2009, first on chips used in IBM's servers and later to chips it makes for other firms, including possibly the Cell processor used in Sony Corp's PlayStation 3.

  "It's a tremendous breakthrough," said Richard Doherty, research director at Envisioneering Group, an analysis firm.

  "It's likely to save energy and increase chip speeds more than any other single advance in the last few years," he said.

  The holes alleviate a problem that has loomed for the semiconductor industry: As chips have shrunk in size, boosting their speed and efficiency, they've increasingly become susceptible to electricity leaking between their closely spaced wires through the intervening insulator, usually glass.

  The most advanced chip technology in large-scale commercial use, which uses circuits 65 nanometers apart, loses almost half of its power to leakage, Doherty said.

  The leakage not only wastes power but also slows down the processor.

  Ideally, the glass would be replaced with vacuum, a better insulator, but removing the glass away in the right places hasn't been possible with current techniques. If the glass was simply etched away, the resulting "ditches" running along the wires would simply be filled in by the next layer of insulating glass applied, according to IBM Fellow Dan Edelstein, chief scientist on the project.

  IBM's polymer technique sidesteps that problem.

  First, the self-assembling material is applied on top of the glass, forming the tiny holes. The chip is then exposed to a gas that seeps through the material as if it were a stencil, etching away the underlying glass to form small holes in the top surface, and larger, continuous gaps between the wires.

  Another layer of glass is applied in a vacuum chamber. Because the holes in the topmost existing glass layer are small, the newly applied layer of glass doesn't seep into the underlying cavities. Instead, it seals them off, with a vacuum inside.

  The technique was invented at IBM's Almaden Research Center in San Jose, California, and the T.J. Watson Research Center in Yorktown, New York.

  It was adapted for commercial use by the University at Albany and IBM's Semiconductor Research and Development Center in East Fishkill, New York.
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